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2011
M. Aldegunde, A.J. García Loureiro, N. Seoane, R.Valín, K. Kalna, ,
"3D Monte Carlo simulations of a 25 nm gate length SOI FinFET using unstructured tetrahedral grids",
VII Workshop of the Thematic Network on Silicon On Insulator Technology, Devices and Circuits. EUROSOI 2011, Granada, Spain, pp. 131-132, 17/01/2011.
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R.Valín, C. Sampedro, N. Seoane, M. Aldegunde, A.J. García-Loureiro, A. Godoy, F. Gamiz, ,
"Multi-Subband Monte Carlo Simulation of Oxide Thickness Fluctuation on SGSOI MOSFETs",
VII Workshop of the Thematic Network on Silicon On Insulator Technology, Devices and Circuits Conference, EUROSOI 2011 , Granada, Spain, pp. 113-114, 17/01/2011.
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N.Seoane, M.Aldegunde, R.Valín, A.J.García-Loureiro, K.Kalna,
"Drift-Diffusion Simulations of a 20 nm In0.53Ga0.47As Implant Free Quantum Well MOSFET",
8th Spanish Conference on Electron Devices, Palma de Mallorca, Spain, IEEE, pp. 155, 08/02/2011.
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M.Aldegunde, N.Seoane, A.J.García-Loureiro, K.Kalna,
"Efficient Monte Carlo Simulation of n-MOSFETs on Unstructured Meshes",
8th Spanish Conference on Electron Devices, Palma de Mallorca, Spain, IEEE, pp. 159, 08/02/2011.
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A.Garcia-Rivera, R.Valín, N.Seoane, M.Aldegunde, A.J.García-Loureiro,
"Parallel Performance of the PETSc Krylov Methods Applied to Linear Systems of 3D Nanodevice Simulators.",
8th Spanish Conference on Electron Devices, Palma de Mallorca, Spain, IEEE, pp. 167, 08/02/2011.
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A.J. Garcia-Loureiro, N. Seoane, M. Aldegunde, R. Valín, A. Asenov, A. Martinez, K. Kalna,
"Implementation of the Density Gradient Quantum Corrections for 3-D Simulations of Multigate Nanoscaled Transistors",
IEEE tr. on Computer-Aided Design of Integrated Circuits and Systems, vol. 30, issue 6: IEEE, pp. 11, 06/2011.
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2010
R.Valín, C.Sampedro, N.Seoane, M.Aldegunde, A.J.García Loureiro, A.Godoy, F.Gámiz,
"Channel Inversion Charge Dependence on Silicon Thickness in Ultra Thin Double-Gate SOI MOSFETs",
Sixth Workshop of the Thematic Network on Silicon-on-Insulator Technology, Devices and Circuits, Grenoble, France, pp. 83 - 84, 25/01/2010.
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2009
J.López Cacheiro, D.Cordero Placer, C.Fernández Iglesias, E.Gutiérrez Sanmartín, R.Valín, C.Fernández Sánchez, J.I.López Cabido, A Rodríguez López, A.J.García Loureiro, M.Aldegunde, N.Seoane, T.F.Pena, J.C.Cabaleiro, F.F.Rivera,
"FORMIGA/G-FLUXO: Adding Computer Labs to the Grid",
3rd Iberian Grid Infrastructure, 3rd, Valencia, Spain, Netbiblo, pp. 237-246, 20/05/09.
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R.Valín, A.J.García Loureiro, M.Aldegunde, N.Seoane, T.F.Pena, J.C.Cabaleiro, F.F.Rivera, D.Cordero Placer, C.Fernandez Iglesias, J.Lopez Cacheiro, C.Fernandez Sanchez, J.I.Lopez Cabido,
"Gridification of a Nanodevice Monte Carlo Simulator for the Formiga Project",
Ibergrid 2009, 3rd, Valencia, Spain, Netbiblo, pp. 109-116, 20/05/09.
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R.Valín, C.Sampedro, N.Seoane, A.Godoy, M.Aldegunde, F.Gámiz, A.J.García Loureiro,
"Study of the influence of gate misalignment on DGSOI MOSFETs",
EUROSOI, Gotemburgo, Suecia, pp. 47-48, 19/01/2009.
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R.Valín, M.Aldegunde, N.Seoane, A.J.García Loureiro, C.Sampedro, A.Godoy, F.Gámiz,
"Using Grid Infrastructures for a Stationary DGSOI Monte Carlo Simulation",
7th Spanish Conference on Electron Devices, Santiago de Compostela (Spain), pp. 172-175, 11/02/2009.
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2008
R.Valín, A.J.García Loureiro, N.Seoane, M.Aldegunde, C.Sampedro, A.Godoy, F.Gámiz,
"Parallel Implementation of a 2D DGSOI Monte Carlo Simulator Using OpenMP",
DCIS 2008, Grenoble, France, 12/11/2008.
Abstract
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K.Kalna, N.Seoane, A.J.Garcia Loureiro, I.G.Thayne, A.Asenov,
" Benchmarking of Scaled InGaAs Implant-Free NanoMOSFETs",
IEEE Transactions on Electron Devices, vol. 55, issue 9, pp. 2297-2306, 2008 .
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M.Aldegunde, N.Seoane, A.J.García Loureiro, P.V.Sushko, A.L.Shluger, J.L.Gavartin, K.Kalna, A.Asenov,
"Atomistic mesh generation for the simulation of nanoscale metal-oxide-semiconductor field-effect transistors",
Physical Review E, vol. 77, issue 5: The American Physical Society, pp. 056702 (9 pages), 2008 .
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